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SEE / MAPLD / Combined* Sessions (*Exclusively for talks spanning both SEE and MAPLD tracks) |
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| SEE Symposium | MAPLD |
| New! Artificial Intelligence (AI) / Machine Learning (ML) in FPGAs/SoCs: AI / ML design considerations for reliable terrestrial, avionic, and aerospace applications; using AI for SEE mitigation; SEE evaluation of designs leveraging AI / ML | |
| Phenomena: Upsets, Functional Interrupts, Transients, Latchup, Gate Rupture, Burnout, etc. | FPGAs/SoCs, PLDs, and New Devices: New and/or novel FPGA and PLDs; Benchmarking of FPGAs and PLDs; Applications of space-borne processing. |
| Basic Mechanisms and Modeling: Destructive and Non-Destructive Effects, Nanoscale Phenomena, Charge Transport and Collection, Impact of Circuit and Environmental Parameters, etc. | Mitigation of Single event effects in FPGAs/SoCs, PLDs, and commercial electronics: Multi-level approaches for high reliability and fault tolerance (redundancy, TMR, SET filtering, etc…), upset mitigation techniques and automated tools, etc. |
| SEE Mitigation Methods Including Radiation Hardened by Design (RHBD) and by Process (RHBP): Approaches for gaining SEE hardness in commercial devices, etc. | Designing with FPGAs/SoCs, and PLDs: agile methods, ESL/HLS and model-based engineering techniques, embedded processing, and synthesis efficiency improvements. |
| Environments and Facilities: Space, Atmospheric and Terrestrial environments. Heavy Ion, Proton, Neutron and Pulsed Laser Test Facilities. | Validation and Verification of FPGAs/SoCs, and PLDs: Verification techniques and languages such as co-simulation, System Verilog and OVM/UVM. Simulation speed-up techniques, emulation, new tools and methods for design validation. |
| Operational Regimes and Performance Data: Systems and Devices from LEO to Interplanetary, High Altitude Aircraft, and Terrestrial. | Availability/Reliability/Susceptibility of programmable devices: Failure mechanisms, reliability testing and characterization, packaging reliability, reliable design practices. |
| Electronic & Photonic Device Data and Measurement Techniques: Memories, Analog/Digital Circuits, systems-on-chip (SoCs), Field Programmable Gate Arrays (FPGAs), Optocouplers, Photonic Integrated Circuits, Power Converters, Sensors, etc. | Novel Applications and Case Studies: Reconfigurable computing, high-performance processing using programmable logic, successful deployment of programmable logic, etc. |
| Systems and Error Rate Computation: Error Mitigation, Error Detection & Correction, Multi-core Processing, and Fault Tolerant Systems; Analytic, Monte Carlo, Mixed-Level, methods, etc. | Technical Management of FPGAs and PLDs: Technical leadership, process management and metrics. |
| Education: Education Practices, Market Demands for Military and Aerospace Component Engineers, and Engineer Retention. | |
| Poster Session (SEE and MAPLD) | |
| Material relevant to any of the above, both SEE and MAPLD, may be presented as a Poster | |
| *All options subject to change any time, per the discretion of the conference committee | |
Registration and Industrial Exhibit Chairwoman: Teresa Farris, Archon, LLC.
Website Curator: Carl Szabo, AS and D, Inc. / GSFC