2013 SEE / MAPLD PRELIMINARY Agenda
| Monday, April 8 | ||
| 5:00 PM - 8:00 PM | Registration Reception | |
| Tuesday, April 9 | ||
| SEE Sessions Begin | ||
| 8:40 AM | Opening Remarks | |
| 9:00 AM - 10:00 AM | Invited Talk: AE9, AP9, and SPM: New models for radiation belt and space plasma specification | Stu Huston Atmospheric and Environmental Research, Inc. |
| 10:00 AM - 10:30 AM | Break | |
| Session: Analog Single-Event Transients Chair: Steve Buchner, NRL |
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| 10:30 AM - 10:50 AM | Single Event Transient Testing of the Aeroflex Voltage Regulator Family Containing Linear Technologies Die | Michael Campola and Jonathan Pellish NASA/GSFC |
| 10:50 AM - 11:10 AM | Comparisons of Single Event Transients Produced by Short Pulsed X-rays, Lasers and Heavy Ion Testing | David Cardoza The Aerospace Corporation |
| 11:10 AM - 11:30 AM | Single Event Characterization of a 40nm Low Noise Amplifier | Karen Freeman Vanderbilt University |
| 11:30 AM - 11:50 AM | Investigation on Manufacturing Discrepancies Impact on TID-ASETs Synergistic Effect in LM124 Operational Amplifier | Nicolas Roche Naval Research Laboratory |
| 11:50 AM - 12:10 PM | First Measurements of Ion-induced Charge-Collection Transients in p-channel InGaSb FETs | Jeffrey Warner Naval Research Laboratory |
| 12:10 PM - 1:40 PM | Lunch | |
| Session: Digital Single-Event Transients Chair: Katherine Scott, Seakr |
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| 1:40 PM - 2:00 PM | SET in high speed CAN transceivers | Vyacheslav Korolev and Vasily Anashin, Joint-stock Company Institute of Space Device Engineering |
| 2:00 PM - 2:20 PM | Single-Event Transient (SET) Analysis of 40 nm Digital-controlled Oscillator (DCO) Topologies | Paula Chen Vanderbilt University |
| 2:20 PM - 2:40 PM | Generation and Characterization of 0.32 um FWHM Spot Size Ultraviolet Optical Pulses: Application to Single-Event Upset in CMOS SOI SRAMs Using Sub-Micrometer Spot Size Ultraviolet Optical Pulses | Ani Khachatrian Naval Research Laboratory |
| 2:40 PM - 3:00 PM | SET Pulse Width Trends in Highly Scaled SOI | Rachel Quinn Vanderbilt University |
| 3:00 PM - 3:30 PM | Fractional-Factorial Analysis of Single-Event Transient (SET) Pulse Widths | Chundong Liang Vanderbilt University |
| 3:30 PM - 4:00 PM | Break | |
| Session: Destructive Single-Event Effects Chair: Leif Scheick, JPL |
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| 4:00 PM - 4:20 PM | Destructive Single-Event Failures in Diodes | Megan Casey NASA/GSFC |
| 4:20 PM - 4:40 PM | Method for Bounding Destructive SEE Rates with Limited Statistics | Ray Ladbury NASA/GSFC |
| 4:40 PM | End of Tuesday Sessions | |
| 6:00 PM- 8:00 PM | Happy Hour | |
| Wednesday, April 10 | ||
| SEE Sessions Continue | ||
| Session: Facilities and Test Methods Chair: Dave Hansen, Maxwell |
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| 8:40 AM - 9:00 AM | Chopper Wheel for Single Event Effect Testing of Low Bandwidth Microelectronic Devices with Short X-ray Pulses | Stephen LaLumondiere The Aerospace Corporation |
| 9:00 AM - 9:20 AM | Two-Photon-Absorption Induced Single-Event Effects (TPASEE): TPA Dosimetry | Dale McMorrow Naval Research Laboratory |
| 9:20 AM - 9:40 AM | On-Edge Irradiation of SOI Logic Cells Hardened by Spatial Redundancy | Ethan Cannon The Boeing Company |
| 9:40 AM - 10:00 AM | High energy (14-40 AMeV) ion beam-line for SEE Testing at U400M FLNR JINR Cyclotron | Semen Mitrofanov JINR FLNR |
| 10:00 AM - 10:30 AM | Break | |
| 10:00 AM - 8:00 PM | Industrial Exhibit | |
| Session: Radiation Hardness and Assurance Methods Chair: Bert Vemeire, Space Micro |
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| 10:30 AM - 10:50 AM | A New Error Correction Circuit for Delay Locked Loops | Pierre Maillard Vanderbilt University |
| 10:50 AM - 11:10 AM | Comparison of the Variable-Depth Bragg-Peak Method for Single-Event Testing to Measured Values of LET Using Pulse Height Analysis | Michael King Vanderbilt University |
| 11:10 AM - 11:30 AM | Application of the Figure of Merit Method to Neutron-Induced Upset Rate Predictions for Sub-50 nm Devices | Matthew Smith Honeywell |
| 11:30 AM - 11:50 AM | Area Overhead Comparison of Various SEU Fault Tolerant Design Techniques | Farouk Smith Nelson Mandela Metropolitan University |
| 11:50 AM - 1:20 PM | Lunch | |
| Session: Single-Event Upsets in Devices Chair: Michael King, Vanderbilt University |
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| 1:20 PM - 1:40 PM | ASIC SEU Rate Prediction in 45nm SOI CMOS Technology | Andrew Kelly BAE Systems |
| 1:40 PM - 3:00 PM | Side Session: SEE for Newcomers The Single Event Envroment and the Physics of Single Event Effects |
Steve Buchner, NRL |
| 1:40 PM - 2:00 PM | An Approach to Support the Use of Double Data Rate X Synchronous Dynamic Random Access Memory (DDRX SDRAM) Technology for High Reliability Space Systems Applications | Lew Cohn NRO/AS&T |
| 2:00 PM - 2:20 PM | What Twenty Years of Solid-State Recorders Tells Us about the Next Twenty | Ray Ladbury NASA/GSFC |
| 2:20 PM - 3:00 PM | An 18μW/MIPS, E-10 SEE/bit-day, Asynchronous Microcontroller | Alain Martin Situs Logic |
| 3:00 PM - 3:30 PM | Break | |
| 3:30 PM - 4:30 PM | Side Session: SEE for Newcomers cont. Single event effects testing, mitigation, and lessons learned |
Leif Scheick, JPL |
| Session: Single-Event Upsets in Programmable Devices Chair: Greg Allen, JPL |
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| 3:30 PM - 3:50 PM | A Guideline for SEE Testing of SOCs | Steven Guertin NASA/JPL |
| 3:50 PM - 4:10 PM | Unanticipated Multiple Bit Upsets (MBUs) in Complex Designs and the Effects of Logic Masking | Melanie Berg MEI Technologies |
| 4:10 PM - 4:30 PM | Quantified Commercial NOR Flash SEE Qualification Results | Craig Hafer Aeroflex Colorado Springs |
| 4:30 PM - 4:50 PM | 72b-wide DDRII Module for FPGA Design and its Single-Event Effects Test Result | Xiao Wang 3D PLUS |
| 4:50 PM | End of Wednesday Sessions | |
| 5:30 PM - 8:00 PM | Industrial Exhibit Reception | |
| Thursday, April 11 | ||
| SEE / MAPLD Combined + MAPLD Sessions Begin | ||
| SEE/MAPLD Combined Session | ||
| 8:00 AM - 8:20AM | MAPLD Introduction | Tim Gallagher, Lockheed Martin Mike Wirthlin, BYU |
| 8:20 AM - 8:40 AM | Upset Rate Estimate Analysis of the Digital Signal Processors in FPGAs | Roberto Monreal Southwest Research Institute |
| 8:40 AM - 9:00 AM | Approval Process for BME Capacitor Use in Xilinx FPGAs | Doug Sheldon NASA/JPL |
| 9:00 AM - 9:20 AM | NBTI-Driven Degradation of 45nm SOI PFET Array | Edward Wyrwas DfR Solutions, LLC. |
| 9:20 AM - 9:40 AM | Laser Testing of NASA SpaceCube Data Processing | Kenneth Zick USC/ISI |
| 9:40 AM - 10:00 AM | Break | |
| 9:40 AM - 1:00 PM | Industrial Exhibit | |
| MAPLD Session 1 - Applications and Reconfigurability Chair: Keith Avery, AFRL |
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| 10:00 AM - 10:40 AM | FPGA Use on Mars Science Laboratory | Doug Sheldon NASA/JPL |
| 10:40 AM - 11:00 AM | Sending real time video from the moon, SpaceIL Payload subsystem challenges and solutions | Sandy Hefftz SpaceIL |
| 11:00 AM - 11:20 AM | Optimizing FPGA Performance, Power, and Dependability with Linear Programming | Nicholas Wulf NSF CHREC |
| 11:20 AM - 11:40 AM | FPGA-based Dynamically Reconfigurable Processing Module for the Solar Orbiter PHI Instrument | Tobias Lange IDA, TU Braunschweig |
| 11:40 AM - 12:00 PM | Dynamically Reconfigurable Hardware for Satellite Payload Processing | Mario Porrmann Bielefeld University |
| 12:00 PM - 1:20 PM | Lunch | |
| 1:20 PM - 2:00 PM | MAPLD Keynote Talk: The Forthcoming Renaissance in Reconfigurable Space Computing | Dr. Alan George U of FL, NSF CHREC |
| MAPLD Session 2 - SEE Testing and Mitigation Chair: Keith Avery, AFRL |
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| 2:00 PM - 2:20 PM | Reprogrammable SRAM based FPGAs in Space Applications - ESA initiatives to enable their safe use | Jørgen Islstad ESA |
| 2:00 PM - 3:00 PM | Side Session: FPGAs for Newcomers What's All this Field Programmable Gate Array (FPGA) Stuff Have to Do With Space, Anyhow? |
Ken LaBel, NASA/GSFC Melanie Berg, MEI Technologies |
| 2:20 PM - 2:40 PM | A CAD Flow for On-Line Testing and Patching Permanent Radiation Effects in Reconfigurable Systems | Mario Porrmann Bielefeld University |
| 2:40 PM - 3:00 PM | Results of the Proton Test Campaign on the RHBD Virtex-5QV FPGA | Gary Swift Xilinx |
| 3:00 PM - 3:20 PM | Break | |
| 3:20 PM - 4:20 PM | Side Session: FPGAs for Newcomers cont. Intro to System-Level Mitigation and High-Level Languages for FPGA-Based Spaceborne Platforms |
Tim Gallagher Lockheed Martin |
| 3:20 PM - 3:40 PM | Modeling the Scrub Rate for SEC/DED BRAMs in FPGA Circuits | Mike Wirthlin BYU |
| 3:40 PM - 4:00 PM | Differentiating Scrub Rates between Space-Flight Applications and Accelerated Single Event Radiation Testing for SRAM based Field Programmable Gate Arrays | Melanie Berg MEI Technologies |
| 4:00 PM - 4:20 PM | SEE Susceptibility of Triple-Module Redundant (TMR) Schemes in FPGA Designs | Roberto Monreal Southwest Research Institute |
| 4:20 PM - 4:40 PM | Single Event Upset Mitigation for MGT-Based Aurora Protocol in a Radiation Environment | Alex Harding BYU |
| 4:40 PM - 5:00 PM | A Lightweight VHDL Implementation of a Xilinx V5-QV Self-Scrubber | Chris Wojahn Sandia |
| 5:00 PM | End of Thursday Sessions | |
| Friday, April 12 | ||
| MAPLD Sessions cont. | ||
| MAPLD Session 2 - SEE Testing and Mitigation cont. Chair: Jim Libous, Lockheed Martin |
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| 8:00 AM - 9:00AM | FPGA SEE Test Guidelines | Melanie Berg MEI Technologies |
| 9:00 AM - 9:20 AM | SERET: A Tool for Weibull Curve Fitting and Space Error Rate Estimation | Brent Nelson BYU |
| MAPLD Session 3 - Devices and Platforms Chair: Jim Libous, Lockheed Martin |
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| 9:20 AM - 9:40 AM | New Development of the 18-port SpaceWire Router | Jennifer Larsen Aeroflex |
| 9:40 AM - 10:00 AM | Break | |
| 10:00 AM - 10:20 AM | Development of a Non-Volatile MRAM used to Boot a Xilinx Virtex-5 FPGA | Jennifer Larsen Aeroflex |
| 10:20 AM - 10:40 AM | RC64: Programmable Many-Core for High Performance Space DSP | Ofer Lapid IMOD |
| 10:40 AM - 11:00 AM | Microsemi Space FPGAs Qualification and Reliability Update | Minh Nguyen Microsemi |
| 11:00 AM - 11:20 AM | The Goddard Attached Payload System | Daniel Espinosa NASA/GSFC |
| MAPLD Session 4 - Design and Verification Chair: Jim Libous, Lockheed Martin |
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| 11:20 AM - 11:40 AM | Hybrid Platform for High Capacity FPGA Validation and Verification | Jerry Kaczynski ALDEC |
| 11:40 AM - 12:00 PM | Closing the Development Loop with Virtual Prototyping | Michael Bradley Mentor |
| 12:00 PM - 1:20 PM | Lunch | |
| 1:20 PM - 1:40 PM | Static Formal Verification Methods and their application to military, satellite, and safety critical designs. | David Landoll Mentor |
| 1:40 PM - 2:00 PM | No room for Error - How to Design Faster, Safer Implementation of High-Reliability, High-Availability Designs using FPGAs | Doug Johnson Synopsys |
| 2:00 PM - 2:20 PM | VHDL's OSVVM, The Death of SystemVerilog? | Jim Lewis SynthWorks |
| 2:20 PM - 2:40 PM | UVM Made Easy - High-level Verification for Hardware Designers | Jerry Kaczynski Aldec |
| 2:40 PM - 3:00 PM | VHDL-2008, The End of Verbosity | Jim Lewis SynthWorks |
| 3:00 PM - 3:20 PM | Multigigahertz Parallel FFTs for FPGA and ASIC Implementation | Doug Johnson Synopsys |
| 3:20 PM | End of MAPLD Sessions / End of Conference | |
CONTACT US
General Chair(s): Peter McNulty, Clemson University (SEE) / Mythi To, Sandia National Laboratories (MAPLD)
Technical Program Chair(s): Leif Scheick, JPL (SEE) / Tim Gallagher, Lockheed Martin & Mike Wirthlin, Brigham Young University (MAPLD)
Industrial Exhibit Chairwoman: Teresa Farris, Aeroflex Corp.
Treasurer: Bill Lotshaw, The Aerospace Corporation
Local Arrangements & Registration Services: Susan Hunt, STAMP Services
SEE-MAPLD Steering Committee: Ken LaBel, NASA/GSFC; Jonathan Pellish, NASA/GSFC; Wes Powell, NASA/GSFC
Newcomers Sessions AV Support: Ken LaBel, NASA/GSFC
SEE Symposium and MAPLD are supported by the Aeroflex Corporation, the Aerospace Corporation, Brigham Young University, Lockheed Martin, the NASA Electronic Parts and Packaging Program, the Naval Research Laboratory, Sandia National Laboratories, and Vanderbilt University.