Donald R. Johnson
September 28, 1995
The 486 test setup consists of two 486 Microprocessor units, a comparator, and an error counter. One circuit contains the Device Under Test (DUT) 486DX2-66, while the second circuit contains the reference 486DX2-66. During testing identical firmware is run on both circuits and if a difference is detected, the error counter increments and the entire board is reset.
The 486 test setup contains the following:
1. 486 Radiation Test Board (RTB)
2. 486 Interface Box (IBOX)
3. Bias Board
4. HP5315a Universal Counter and Fluke 1912A Counter
5. Three 5Vdc 2 A power supplies
6. One 5Vdc 0.5 A power supply (IBOX power)
7. Interconnect cables
THE 486 RADIATION TEST BOARD (RTB)
The 486 rTB is a multi-layer printed circuit board containing two identical 486 uP circuits and a comparator. A radiation source is applied to the DUT, and the other 486 circuit is used as a reference. The comparator outputs an error pulse when a difference is deteted on any address or data line or control output signal. The two 486 circuits are synchronized 100% of the time during normal operation (zero-differences). The RTB is not used inside the chamber.
Each 486 circuit has the following characteristics:
1. External clock is 25MHz (used 16MHz)
2. 128K bytes EPROM
3. 128K bytes RAM
4. Wait State Generator
5. Interrupt Controller
6. Software Performance Monitor
7. Software which executes one or all of the following (with cache on or off):
a. Interrupt Test
b. CoProcessor Test
c. Paging Mode Test
d. Memory Test
e. Software Performance Test
After initialization, the software reads a DIP switch located inside the IBOX. This read tells the two uP circuits which test to run.
THE 486 INTERFACE BOX (IBOX)
The IBOX is used to route power to, and control the RTB. The following functions can be performed:
1. Reset the board
2. Specify software test to perform
3. Turn caches on or off
4. Monitor the 'ERROR' signal (coax conn. labeled 'ERR')
5. Verify both uP circuits are running (coax conn. labeled 'SW1' and 'SW2')
HP5315A UNIVERSAL COUNTER AND FLUKE 1212A COUNTER
The counters have three purposes:
1. Count the 'ERROR' pulses (IBOX 'ERR' to counter input)
2. Verify uP circuit #1 is running (IBOX 'SW1' to counter input)
3. Verify uP circuit #2 is running (IBOX 'SW2' to counter input)
THREE 5VDC POWER SUPPLIES
A 5Vdc-2 A or greater power supply is needed for the following:
1. 486 uP circuit #1
a. Applied to coax conn. labeled 'PWR1' on the RTB
b. Nominal current: approx 750mA with caches on
2. 486 uP circuit #2
a. Applied to coax conn. labeled 'PWR2' on the RTB
b. Nominal current: approx 750mA with caches on
3. 486 RTB
a. Applied to coax conn. labeled 'PWR' on the RTB
b. Nominal current: approx 1.3A with caches on
ONE 5VDC POWER SUPPLY
A 5Vdc-0.500 A or greater power supply is needed for the following:
1. 486 IBOX
a. Applied to coax conn. labeled 'PWR' on the IBOX
b. Nominal current: approx 200mA with caches on
One cable connects the RTB to the IBOX. This cable has a one to one pinout and an DC37P at each end.
TOTAL DOSE TESTING
A total of five 486DX2-66 units were tested. The five units were placed on a bias board for exposure in the chamber. After all five units are exposed to the same dosage they were removed from the chamber and tested on the radiation test board (RTB), which does not enter the chamber. A counter value other than zero in a 15 min. interval constitutes a functional test failure. The external clock used was 16MHz.
The 486DX2-66 showed functional failures at 25kRAD. Units 3 & 4 showed no errors for 15-30 seconds, at that point errors started counting in ~ 1 second intervals. Unit 5 showed no errors for < 10 seconds, then errors started counting in ~ 1 second intervals. Units 6 & 7 would not synchronize with the reference 486DX2-66 at start-up and unit 6 was subsequently used as the reference for unit 7 which then showed no errors for 15-30 seconds, then errors started counting in ~ 1 second intervals. Consequent to using an irradiated unit as reference it is unknown if one or if both units failed.
Current increased consistently on all units. With cache off: Icc=370-380mA at 0kRAD increasing to Icc=600-650mA at 25kRAD. With cache on: Icc=470-490mA at 0kRAD increasing to Icc=670-680mA at 25kRAD (unit 5 data incomplete at this point due to failure in < 10sec).
Waveform data 0kRAD to 20 kRAD (25kRAD not complete due to speed of failure) showed a consistent decrease in overshoot for both rising and falling edge voltage. Also a decrease in the rise and fall times (tr & tf) was noted.
After an 73 hour Anneal period units were again tested with results consistent with those noted at 25kRAD level. Current increased consistently on all units. With cache off: Icc=570-580mA. With cache on: Icc=650-660mA. Unit 5 data was as follows: cache off: Icc=640mA. With cache on: Icc=NA (due to failure < 5sec). Complete waveform data still not available due to quickness of failure althrough from the few data points observed timing is consistent with that of 20kRAD.