TEST REPORT
FOR
PROTON EXPERIMENT
AT
UCD CYCLOTRON FACILITY
5/24-25/94

C.M. Seidleck
Hughes/ST Systems
Lanham, MD 20706

K.A. LaBel
NASA/GSFC
CODE 735
Greenbelt, MD 20771

I. INTRODUCTION

The objective of this study was to determine the cross-sections for single event upset (SEU) and single event latchup (SEL) due to protons of candidate spacecraft electronics. The Fujitsu, Hitachi, Toshiba, and Motorola 16 MBit DRAMs, and IDT split-epi FIFOs were tested for the Far Ultraviolet Spectroscopic Explorer (FUSE) and Mission Technology Initiative (MTI) projects. Additionally, the IDT 3.3V dual-port RAM was tested in conjunction with Naval Research Laboratory (NRL). This piece may also be applicable to FUSE.

II. TEST SAMPLES

Relevant characteristics of the devices are summarized in the following table:

Device Type        Mfg.           Date Code      Technology

8116400-60PJ       Fujitsu        9337T56        CMOS
HM5117400RR7       Hitachi        9236           CMOS
TC5117400FT-70     Toshiba        9322HCK        CMOS
MCM516400J60       Motorola       9331           CMOS
MCM517400J60       Motorola       9348           CMOS
7201T              IDT            JEG8334        6u Split-Epi CEMOS
70324L             IDT                           CEMOS (low power
                                                 * Tested by NRL and will not
                                                   be discussed herein.
Both lidded as well as delidded samples of devices were tested in order to accommodate beam penetration limits at lower energies as well as to detect the effects, if any, of direct ionization.

III. TEST TECHNIQUES AND SETUP

A. Facility Usage

The test facility used was the University of California at Davis Cyclotron. Maximum energy at the facility is 63 MeV. Energies are those incident to the device or device package. Energies may be varied by either by tuning or by the use of degraders in the beam line. Energies utilized for testing were: 25, 38, and 63 MeV.

B. Test Hardware, Software and Control

Test hardware, software, etc,... consisted of a DUT board placed in the test chamber, 75 feet of twisted pair ribbon cable, and two PC-based testers, the Omnilab and VXI systems. Both testers provide test patterns to the test boards and are capable of capturing output when errors occur. The VXI enhances the error capture by using an intrinsic compare and a custom-built FIFO buffer board thereby reducing processing time and eliminating the need for additional hardware on the DUT boards. Both systems are capable of controlling the entire test setup, digital counters, power supplies, waveform generators via an IEEE 488 bus. Proton beam/test control is provided by a PC-based package entitled the "Beam Monster".

C. Device Test Procedure

The test procedure was similar for all devices tested. All tests were dynamic in nature, meaning that the devices were operating during the test as they would in a spacecraft application. First, power was supplied to the device. A stimulus pattern was then loaded and the device would function normally prior to exposure to the ion beam. The proton beam would then be activated. Outputs from the device were constantly monitored by either the Omnilab or VXI and all errors accumulated until either fluence was reached or a latchup condition occurred. In the case of the latter, power to the device was terminated and the test run ended prematurely. Otherwise, error counts were logged to the hard drive. Two to three samples are typically used for testing to gain statistical validity. All DUTs were tested under a (nominal) 25 degrees celsius. Block diagrams of all test setups are shown in figures 2 and 3.

IV. RESULTS AND DISCUSSIONS

Objectives defined for these devices prior to testing were: energy dependence, angular dependence, and a quick-look total dose tolerance.

1. 8116400-60PJ 4M x 4 (16 MBit) DRAM (Fujitsu)

This device was tested using a checkerboard data pattern in Read/Modified Write mode with a 4 K refresh cycle (65.6 msec). Operated at 5V with a nominal current of 17 mA, the device was run at a speed of 900 nsec. An SEU was defined as a noncompare in the data during the Read from one of the 4 data lines being monitored (1 line for each 4MBit block). The device was also monitored for latchup (maximum current 100mA).

Figure 4 shows the DRAM cross section per device versus energy for both lidded and delidded samples. The two types of samples show little difference with the maximum cross section > 1.0E-07 cm2/device. Cross section showed a slight linear increase with energy. Figure 5 shows there was no significant angular dependency. During total dose testing, significant permanent increases in device current were seen, however, the device was still fully functional. Total dose failure was observed at ~ 42 KRad(Si) rendering the device inoperable.

TID (KRad(Si))      Icc(mA)
0                   17
38.4                25
43                  50
2. HM5117400RR7 4M x 4 (16 MBit) DRAM (Hitachi)

This device was tested using a checkerboard data pattern in Read/Modified Write mode with a 2K refresh cycle (32 msec). Operated at 5V with a nominal current of 17 mA, the device was run at a speed of 900 nsec. An SEU was defined as a noncompare in the data during the Read from one of the 4 data lines being monitored (1 line for each 4MBit block). The device was also monitored for latchup.

Figure 6 shows the DRAM cross section per device versus energy for lidded samples. Cross section shows a slight linear increase with energy and has a maximum cross section ~ 3.8E-07 cm2/device. The device was total dose tested to ~ 50 KRad(Si) during which time permanent increases in device current were observed, but the device remained fully functional.

TID (KRad(Si))      Icc(mA)
0                   17
50                  24
3. TC5117400FT-70 4Mx4 (16 MBit) DRAM (Toshiba)

This device was tested using a checkerboard data pattern in Read/Modified Write mode at 5V with an operating current of 17 mA at a speed of 900 nsec. This device had a 2 K refresh cycle (32 msec). An SEU was defined in the same way as with the Fujitsu and Hitachi DRAMs. Maximum current for this device (for latchup monitoring) was 90 mA.

Figure 7 shows the DRAM cross section per device versus energy for lidded samples. Cross section shows a slight linear increase with energy and has a maximum cross section ~ 1.8E-06 cm2/device. The device was total dose tested to ~ 100 KRad(Si) and although permanent increases in device current were observed, but the device remained fully functional.

TID (KRad(Si))      Icc(mA)
0                   18
101                 19
4. MCM516400J60 4M x 4 (16 MBit) DRAM (Motorola)

This device was tested using a checkerboard data pattern in Read/Modified Write mode with a 4 K refresh cycle (65.6 msec). Operated at 5V with a nominal current of 17 mA, the device was run at a speed of 900 nsec. An SEU was defined as a noncompare in the data during the Read from one of the 4 data lines being monitored (1 line for each 4MBit). The device was also monitored for latchup.

Figure 8 shows the DRAM cross section per device versus energy for lidded samples. As shown in figure 8, the cross section increases slightly with energy and has a maximum cross section ~ 1.5E-06 cm2/device. Since this device has the same die as the Toshiba (TC5117400FT-70) the results are similar.

5. MCM517400J60 4M x 4 (16 MBit) DRAM (Motorola)

This device was tested in the same manner as the MCM516400J60 but with a 2 K refresh cycle (32 msec). The results found were very similar to the Motorola (MCM516400J60).

6. 7201T 6u 512 x 9 Split-Epi FIFOs

These devices were tested using an all 1s pattern in Read/Write mode at a 50% duty cycle at a frequency of 1 MHz. An SEU was defined as a noncompare in the data. Normal operating current was 13 mA, with monitoring for latchup conditions (maximum current 28 mA). These devices were special samples from the vendor.

Figure 9 shows the DRAM cross section per device versus energy for both lidded and delidded samples. These devices were not easily upset by protons. During total dose testing, permanent significant increases in device current occurred, however, the devices remained fully functional to > 100 KRad(Si).

TID (KRad(Si))      Icc(mA)
0                   12
54                  15
81                  21
108                 27
V. SUMMARY

- The Hitachi and Fujitsu DRAMs were fairly tolerant to proton induced SEUs. No proton induced latchup was seen for either device. Based on the proton and recent heavy ion tests, the Fujitsu may have use in an error tolerant application with a lower TID requirement (the Fujitsu saw TID failure at ~ 42 KRad(Si)). The Hitachi needs only heavy ion tests for full characterization of the device, but shows promise as well.

- Test results for the Toshiba and Motorola pieces were not as promising. They showed an experimental cross section approximately an order of magnitude greater than the Fujitsu and Hitachi. Although the Toshiba was still functional to a total dose of 100 KRad(Si), however, heavy ion testing of this piece yielded anomalies which were inconsistent with existing test data. These anomalies are being investigated.

- Proton tests on the IDT 6u split-epi FIFO showed excellent results. Previous testing shows it to be susceptible to heavy ion SEUs, but this device could still be used in an error tolerant application

VI. ACKNOWLEDGEMENTS

Thanks to Paul Marshall (NRL/SFA) and Cheryl Dale (NRL) and UCD operators for their support to the GSFC test team.